Xilinx Aims Ultra-Programmable Accelerators At AI, 5G Workloads
Xilinx is looking to take large-scale, cutting-edge workloads to the next level with its upcoming family of programmable hardware accelerators
Semiconductor firm Xilinx, known for its programmable logic devices, has unveiled a family of ultra-programmable hardware devices intended as accelerators for cutting-edge workloads including artificial intelligence, big data analytics and 5G mobile networking.
The Versal family is based on Xilinx’s adaptive compute acceleration platform, or ACAP, which brings multiple acceleration technologies together with cutting-edge memory, software development tools and frameworks for specialised workloads.
At its second Xilinx Developer Forum (XDF) in San Jose, California, this week, the company said ACAP is the result of its Everest project, which spanned multiple years and cost more than $1 billion (£770m).
At a briefing ahead of the announcement, Xilinx said Versal is designed to fill the need for something that is “inherently software programmable from the ground up”.
Next-gen acceleration
Xilinx specialises in programmable devices such as FPGAs, and Versal is aimed at engineers who have begun using such devices alongside GPUs and Intel’s Xeon Phi co-processors as accelerators for highly specialised workloads.
Such accelerators are intended to speed up the processing of compute-intensive tasks such as machine learning and data analytics on a large scale, without the power drain that would accompany the addition of general purpose CPUs.
The ACAP platform is built on a 7-nanometer FinFET manufacturing process from Taiwan Semiconductor Manufacturing (TSMC), and includes scaler processing engines based on ARM’s Cortex-A72 application processor and Cortex-R5 real-time processor architectures, as well as adaptable hardware engines designed to allow custom memory hierarchy and on-the-fly reconfiguration.
The platform includes intelligent engines with a digital signal processor (DSP) engine for low-latency, high-precision floating point workloads, as well as an AI engine.
It includes integrated host interfaces such as PCIe Gen4x16 and CCIX, scalable memory controllers, protocol engines, multiple transcievers, programmabe I/O interfaces and a network-on-a-chip, as well as frameworks including TensorFlow, Caffe and Spark for developers and data scientists.
AI boost
The initial Versal products introduced at XDF are Versal AI Core, which Xilinx said would boost AI processing performance to a level greater than GPUs can provide, and Versal Prime, which is aimed at diverse workloads including signal processing, for applications such as 5G networks.
Both lines are due to be generally available in the second half of next year, with nine versions of Prime and five versions of AI Core set to be on offer.
The Versal Premium line, for high-performance applications, and AI Edge, for low-power machine learning in edge devices, are due to arrive in the first half of 2020, followed by Versal AI RF for radio communications in the second half of that year, and Versal HBM, for applications needing high-bandwidth memory, sometime in 2021.
