Intel Touts High-End Xeon Chips For Big Data

Intel has launched the latest version of its high-end Xeon E7 x86 processors, aimed at compute- and memory-intensive workloads driven by big data and the Internet of things.

At the same time, Intel officials are also pushing the platform as an alternative to the RISC platforms from the likes of IBM and Oracle, promising significant gains in performance, power efficiency and costs for organisations that migrate from RISC to the x86 architecture.

RISC Alternative

In a press conference from San Francisco 18 February, Diane Bryant, senior vice president and general manager of Intel’s Data Center Group called the new Xeon E7 v2 a “dramatic refresh” of the company’s high-end x86 server platform, and said the rapidly growing need of businesses to capture, analyse and act on the massive amounts of data being generated plays into the capabilities the chip maker is putting into the new processors.

She also noted that in a recent survey by Intel of CIOs, 82 percent said that having better solutions that could help them sort through the data and make more affective business decisions more quickly is important to them. At the same time, only 5 percent said they had a big data solution in operation.

“That gap presents a wonderful opportunity” for Intel and its partners, Bryant said during the press conference, which was webcast.

Pointing to numbers from IDC, Intel officials expect the big data market to hit $32.4 billion (£19.4bn) by 2017. During her presentation, Bryant pointed to several examples of how businesses are benefiting from big data, including VISA, which has saved $2 billion (£1.2bn) in fraud detection due to data analytics,

Performance Boost

Intel is offering 20 different configurations of the 22-nanometer Xeon E7 v2 chips – codenamed Ivytown – that offer variations in the core count, frequency and memory caches so they can be optimized for a wide range of workloads. The chips, which are made for systems with up to 32 sockets, offer up to 15 cores and up to 1.5 terabytes of memory per socket – three times the capacity of the previous Xeon E7 processors – and speeds up to 3.4GHz. The 15 cores is the most in an Intel chip, with the previous high being 12 cores. Advanced Micro Devices offers 16 cores in some of its Opteron server chips.

The new Intel chips offer twice the performance of the previous generation – they built on the Ivy Bridge architecture and include the chip maker’s 3D Tri-Gate transistor technology – more than twice the in-memory processing capabilities and four times the I/O capacity, to enable Intel to keep a balanced architecture that can feed data to the growing number of cores, Bryant said.

The chip’s Intel Integrated I/O, Data Direct I/O and support for PCIe help drive the fourfold improvement in I/O, which reduces the bottlenecks and increases capacity for storage and networking connections, she said.

Included in the new chips are reliability and uptime features collected in Intel’s Run Sure Technology. The features include what Intel officials are calling memory resilient technologies, such as OS memory on-lining and fine-grain memory mirroring to ensure data integrity and systems that can run reliability over longer periods of time, and resilient system technologies, like MCA recovery execution path and MCA I/O, which enable systems to diagnose what in the past would have been fatal errors and to recover from them. Intel officials first talked about Run Sure Technology at the Intel Developer Forum in China in 2013.

Intel officials are aiming the new Xeon E7 v2 chips at the largest and most compute-intensive workloads, from data analytics and high-performance computing (HPC) to business intelligence, virtualisation and databases. Bryant and other Intel executives said the new capabilities in the chips offer a strong argument for businesses to either upgrade their existing x86-based systems or make the move from RISC to the Intel architecture.

In a demonstration, Shannon Poulin, vice president and general manager of Intel Data Center Marketing Group, demonstrated how the new chips’ greater in-memory capabilities enabled a system to process data more than 128 times faster than one powered by the previous Xeon E7 chips. In addition, Bryant noted that while the global RISC server market continues to contract – only 6 percent of servers with four or more sockets sold are RISC-based – those still make up more than 52 percent of revenues for that category.

In a four-socket system, the new Xeon E7 v2 chips offer an 80 percent increase in performance and an 80 percent improvement in total cost of ownership over four years than IBM’s Power7 processor. As the need for computing goes up, Intel is enabling the cost of both server and storage technology to continue to decline, Bryant said. With the new chips, Intel can now boast performance leadership against IBM’s Power chips or Oracle’s SPARC portfolio.

Replacement Cycle

At a workshop for journalists last month, Intel officials said that a key opportunity for the company will be in replacing older x86-based systems, particularly given the performance gains offered for such workloads as SAP HANA analytics deployments, where a four-socket system with the new Xeon E7 v2 chips can process twice the number of inquiries than a server with the previous generation. There is also a doubling in the number of Java business operations processed per second.

In all, more than 20 OEMs – ranging from IBM, Hewlett-Packard and Dell to Lenovo, SGI, Unisys and Cisco Systems – are offering more than 40 system designs based on the new processors, according to Bryant. Several partners and end users took the stage during the press conference to talk about how they are utilising the new Xeon E7 v2 chips.

Chris O’Malley, CEO of VelociData, which offers an appliance based on HP servers that prepares data for analytics, talked about improvements in processing time of more than 1,000 times, while Moiz Kovari, vice president of the London Stock Exchange, said his organisation utilises System x servers from IBM. Kovari spoke about the need for an end-to-end system design that can help bring greater computing capabilities to the stock exchange.

“We need denser platforms to really consolidate our data centres,” he said.

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Originally published on eWeek.