Chip manufacturer Intel has outlined its plans to provide ‘exascale’ computing performance for use by parallel applications by the end of this decade, at the International Supercomputing Conference (ISC) in Hamburg.
Using its Many Integrated Core (MIC) architecture, Intel can enable supercomputers to carry out ‘quintillions’ of computer operations per second – hundreds of times more than today’s fastest supercomputers. The first Intel MIC product, codenamed “Knights Corner”, was unveiled last year. It is planned for production on Intel’s 22-nanometer technology and is expected to start arriving in 2012.
“While Intel Xeon processors are the clear architecture of choice for the current Top500 list of supercomputers, Intel is further expanding its focus on high-performance computing by enabling the industry for the next frontier with our Many Integrated Core architecture for petascale and future exascale workloads,” said Kirk Skaugen, Intel’s vice president and general manager of the Data Center Group.
A number of companies, including F Z Juelich, Leibniz Supercomputing Centre (LRZ), CERN and Korea Institute of Science and Technology Information (KISTI) have been testing the technology over the past year, using Intel’s software development vehicle (SDV), known as Knights Ferry. By the end of June the company will have 50 companies testing its SDV, and hopes to have 100 customers by the end of the year.
One of the great advantages of Knights Corner is that the MIC technology provides a familiar programming environment for anyone who is used to working with Xeon x86.
“If you can programme a Xeon you can programme a microprocessor, because it uses the same tools, the same compliers, and it has the same programming model that exists on x86 today,” said Anthony Neal-Graves, vice president of Intel Architecture Group.
As well as ease of programming, Intel’s plans also take energy efficiency into account. Supercomputing companies are looking at offering 500x the compute power of current systems within the next eight years, meaning that power consumption is set to grow dramatically during that time.
“It’s really about delivering performance or flops within a manageable power budget, that’s the key issue that we’re facing in this space,” said Neal-Graves.
To address this challenge, Intel has teamed up with European researchers to run three new labs, dedicated to establishing a ‘sustained partner presence’ in Europe. This will include creating simulation applications that begin to address the energy efficiency challenges of moving to exascale performance.
Intel took the opportunity at ISC to show off its array of partners – including SGI, which today announced its own plans to drive wide industry adoption of petaflop computing.
“We, like many others, look towards getting to the exaflop level within the decade. It’s a real challenge to scale up to that level of performance,” said Mike Woodacre, chief engineer at SGI. “Even with Moore’s law giving us more transistors per chip, that’s only going to give us about 40x improvement. So we’re really looking at the MIC technology to give us this additional order of magnitude performance increase that we need to deliver systems of this scale.”
Meanwhile, Intel was named in the 37th edition of the Top500 list as a leader in high-performance computing, with more than 77 percent of current systems powered by Intel processors. The company’s lastest 32nm Xeon 5600 series processors now power more than 35 percent of all systems in TOP500 list.
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