Intel is confident that in the future it can produce transistors at the staggeringly small line width of five nanometers (5nm), the Intel Developer Forum (IDF) in San Francisco heard yesterday.
Five nanometers is a step beyond the ten nanometer processes currently at the leading edge. However, it will be about five years before the new process can be made into the large-size 450 millimetre silicon wafers which make the most cost-effective mass produced chips, Mark Bohr, Intel Senior Fellow of Logic Technology Development, told an IDF press conference, according to TechEye.
It’s been several years since Intel staerted looking at materials and structure to continue scaling in accordance with Moore’s Law. The 3D fabrication “Trigate” technology will be used for a couple more generations, he said. Transistor performance and leakage are still being looked at to improve transistors.
In the last few generations Intel has improved performance and aims to continue reducing leakage. It’s doing that on several fronts for CPUs that range from mobile to server. Intel will continue to use Trigate for 14 nanometres and 10 nanometres too. At 22 nm, there’s 20 percent better performance on multithreaded applications and 20 percent lower power. It is swiftly removing defect densities.
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